1. Field of the Invention
The invention relates to a semiconductor wafer comprising a silicon substrate wafer doped with dopant atoms of the n type or p type and having a low resistance, with a front surface and a back surface, and comprising a layer deposited epitaxially on the front surface of the substrate wafer.
2. Background Art
A semiconductor wafer of the type to which the invention is directed is suitable, in particular, as a base material for the fabrication of electronic power semiconductor components, with the components being integrated in the epitaxially deposited layer (epi layer) and the flow of current through such components usually passing through the epi layer and the substrate beneath it. The electrical resistance of power semiconductor components, in the on state, is therefore dependent to a significant extent on the resistivity of the substrate wafer, and this resistivity is approximately inversely proportional to the concentration of the dopant atoms. When producing the single crystal which is subsequently divided into substrate wafers, the concentration of these dopant atoms is usually set by the addition of dopant.
The processes for producing single crystals from silicon which are in most widespread use on an industrial scale are the Czochralski method (CZ method) and the float zone method (FZ method). However, it is not possible to increase the concentration of dopant atoms without restriction in such processes. If the dopant concentrations in the melt are too high, dislocations which disrupt the single crystal structure of the crystal are formed during the pulling of single crystals using the CZ method. The lowest substrate resistance which can be achieved by adding dopant when producing the single crystal also depends on the type of dopant and the size of the single crystal. In the case of phosphorus, the lowest resistance produced in this way is in the region of 0.71 mOhmcm. For crystals with a diameter of 150 mm or 200 mm, as are used for the industrial manufacture of the latest generation of power semiconductor components, the lowest resistance which can be achieved in practice is, however, above this value (approx. 0.9 mOhmcm).